This invention relates, in general, to semiconductor devices and, more particularly, to a novel deep depletion complementary MOS device.
The typical metal oxide semiconductor field effect transistor (MOS/FET) requires the formation of a conducting channel, of opposite conductivity type to that of the bulk, at the surface of the semiconductive material. Traditionally, to operate a transistor in the enhancement mode, a body of semiconductive material of one conductivity type is provided with active zones of opposite conductivity type which zones are embedded below the surface of the semiconductive material to form drain and source zones. The conducting channel is formed between the drain and source zones by applying appropriate biasses to the source and drain zones and to a gate structure located on the surface of the semiconductive material at the channel region but separated therefrom by a thin insulating layer. To operate such a device which has been provided, for example, with N+ type drain and source zones formed in a P or P-type semiconductor body, the surface region, formed between the drain and source zones, will invert to form a conducting channel when the gate is appropriately biassed. Thus, a normally nonconducting device is made conducting when the voltage applied to the gate structure is lower than the voltage applied to the source zone.
Another type of transistor operating in the enhancement mode is referred to as a deep depletion thin film device. This device is typically fabricated from a pair of N+ zones, for example, that have been formed in an N or N-type semiconductor body. In this instance, the N-type semiconductor body portion between the N+ drain and source zones (the channel region) is normally nonconductive in the absence of a gate/source bias. For a detailed exegesis of the operation of such deep depletion devices, attention is directed to an article authored by S. R. Hofstein, entitled "An Analysis of Deep Depletion Thin-Film MOS Transistors" appearing in IEEE Transactions on Electron Devices, Vol. ED-13, No. 12, December 1966 at pages 846-854. Another article, dealing with the same subject matter is authored by F. P. Heiman, entitled "Thin-Film Silicon-On-Sapphire Deep Depletion MOS Transistors" appears at pages 855-862 of the same volume.
Thus, as shown in both articles when appropriate voltages are applied to the N+ drain and source zones of deep depletion thin film devices, the normally nonconducting region formed at the surface between the drain and source zones is made to "accumulate" and become conductive when the voltage applied to the gate structure is higher with respect to the voltage applied to the source zone. Conversely, when a deep depletion thin film device is fabricated from a pair of P+ type zones formed in a P or P-semiconductive body, the device will "accumulate" and form a conductive channel when the voltage applied to the gate is lower with respect to the voltage applied to the source.
While the art is replete with many instances of Complementary Metal Oxide Semiconductor (CMOS) inverters, they all share the same feature in that the distinct zones of opposite conductivity or zones of higher concentrations of the same conductivity are utilized to form the various devices. It is, therefore, rationalized that a CMOS device that is characterized by the absence of the distinct source and drain zones would be much more easily fabricated since it would require fewer diffusion or ion implantation steps and would also occupy less space on a given size chip. In addition, it will now become obvious to those skilled in the art that by decreasing the number of processing steps the yield will increase accordingly.